The 3D interconnection-an enhanced densification approach with bare chips

The author proposes interconnecting the bare chips along the Z axis rather than in the XY plane, thereby enabling a large enhancement of densification (by a factor of five to eight). This technique also substantially improves the high-frequency behavior of ICs. Inductances are very low, for example, since the longest conductor will not exceed 4.8 mm in length. In addition, the capacitances of the conductors, compared with those of the chips´ silicon lateral areas, are 10 to 100 times less than they would be with an on-polyimide thin-film interconnection. An application consisting of a cube of eight stacked 256-kb SRAMs is presented.<>