DocumentCode
2694920
Title
Unbalanced voltage effects on a single phase multilevel inverter due to control strategies
Author
Aguillón-Garcia, Jacobo ; Fernández-Nava, José Mariano ; Bañuelos-Sánchez, Pedro
Author_Institution
Electron. Eng. Dept., Univ. de las Americas-Puebla, Puebla, Mexico
fYear
2004
fDate
19-23 Sept. 2004
Firstpage
140
Lastpage
145
Abstract
This work presents two control strategies for a single phase multilevel inverter to demonstrate how affects the natural balance on the flying capacitors to the output voltage. The analyzed topology is based on a stacked multicell converter (SMC), which uses stacks and columns in a matrix configuration to minimize the voltage stress on all semiconductor components. Due to the array is built with p-series commutation cells disposed on n stacks; the circuit has more elements, allowing to divide the voltage in all the semiconductors. Then, the control strategy becomes too complex, for that reason we proposed the use of a fixed control and later on a PWM strategy to evaluate the output voltage and the natural balancing on the flying capacitors. The first control strategy was implemented with simple switching signals to the commutation cells generated by FPGA technology. The second control strategy was generated by horizontally phase shifted carrier PWM strategy. The physical setup uses a DSP card, to generate the switching signals, and FPGA to shift signals between cells. Both control strategies where based on a SMC prototype of two cells and two stacks. The paper shows a detailed theoretical background as well as the simulation and experimental results obtained on a low power-high voltage circuit.
Keywords
PWM invertors; capacitors; commutation; digital signal processing chips; field programmable gate arrays; switching convertors; DSP; FPGA technology; digital signal processing card; field programmable gate arrays; flying capacitors; horizontally phase shifted carrier PWM; low power-high voltage circuit; matrix configuration; p-series commutation cells; pulse width modulation; semiconductor components; single phase multilevel inverter; stacked multicell converter; switching signals; unbalanced voltage effects; voltage stress; Capacitors; Circuit topology; Field programmable gate arrays; Matrix converters; Pulse width modulation; Pulse width modulation inverters; Signal generators; Sliding mode control; Stress; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Telecommunications Energy Conference, 2004. INTELEC 2004. 26th Annual International
Print_ISBN
0-7803-8458-X
Type
conf
DOI
10.1109/INTLEC.2004.1401457
Filename
1401457
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