An enhanced parallel planar lattice architecture for large scale neural network simulations

An enhanced parallel toroidal lattice architecture (TLA) for simulations of large-scale neural networks is proposed. The TLA was implemented on a transputer array. A planar lattice architecture for neural network simulations (PLANNS) is also proposed as an improved version of TLA. The processor connections of this architecture are configured in a completely planar lattice structure, which is the most efficient structure for implementation using wafer-scale integration and increased parallel expandability. The performance of the PLANNS is almost proportional to the number of processors. Furthermore, this architecture exhibits great flexibility in simulating the various neural network architectures and a variety of neuron models