Title :
Effects of multi-node charge collection in flip-flop designs at advanced technology nodes
Author :
Sheshadri, Vijay B. ; Bhuva, Bharat L. ; Reed, Robert A. ; Weller, Robert A. ; Mendenhall, Marcus H. ; Schrimpf, Ron D. ; Warren, Kevin M. ; Sierawski, Brian D. ; Wen, Shi-Jie ; Wong, Rick
Author_Institution :
Dept. of Electr. Eng., Vanderbilt Univ., Nashville, TN, USA
Abstract :
Circuit-level simulations predict increased vulnerability of flip-flop designs and increased occurrence of single-event upsets in advanced technologies due to multi-node charge collection from single-ion strikes. This trend is examined by simulating 3D models of the flip-flops in a terrestrial neutron environment with Monte-Carlo simulations of charge generation in several technology generations.
Keywords :
Monte Carlo methods; flip-flops; logic design; 3D models; Monte-Carlo simulations; charge generation; circuit-level simulations; flip-flop designs; multinode charge collection; single-event upsets; single-ion strikes; terrestrial neutron environment; CMOS technology; Capacitance; Delay; Flip-flops; Integrated circuit technology; Isolation technology; Master-slave; Space technology; Transistors; Voltage; DFF; DICE; Flip-flops; MRED; charge sharing; component; multi-node upsets;
Conference_Titel :
Reliability Physics Symposium (IRPS), 2010 IEEE International
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-4244-5430-3
DOI :
10.1109/IRPS.2010.5488683
