• DocumentCode
    2697860
  • Title

    LOP_RE: Range encoding for low power packet classification

  • Author

    He, Xin ; Peddersen, Jorgen ; Parameswaran, Sri

  • Author_Institution
    Dept. of Commun. Eng., Tampere Univ. of Technol., Tampere, Finland
  • fYear
    2009
  • fDate
    20-23 Oct. 2009
  • Firstpage
    137
  • Lastpage
    144
  • Abstract
    State-of-the-art hardware based techniques achieve high performance and maximize efficiency of packet classification applications. The predominant example of these, ternary content addressable memory (TCAM) based packet classification systems can achieve much higher throughput than software-based techniques. However, they suffer from high power consumption due to the highly parallel architecture and lack high-throughput range encoding techniques. In this paper, we propose a novel SRAM-based packet classification architecture with packet-side search key range encoding units, significantly reducing energy consumption without reducing the throughput from that of TCAM and additionally allowing range matching at wire speed. LOP_RE is a flexible packet classification system which can be customized to the requirement of the application. Ten different benchmarks were tested, with results showing that LOP_RE architectures provide high lookup rates and throughput, and consume low power and energy. Compared with a TCAM-based packet classification system (without range encoding) implemented in 65nm CMOS technology, LOP_RE can save 65% energy consumption for the same rule set over these benchmarks.
  • Keywords
    SRAM chips; content-addressable storage; encoding; parallel architectures; pattern classification; telecommunication networks; 65nm CMOS technology; LOP_RE architectures; SRAM-based packet classification architecture; energy consumption reduction; high-throughput range encoding techniques; low power packet classification; packet-side search key range encoding units; parallel architecture; ternary content addressable memory; Application software; Associative memory; Benchmark testing; CMOS technology; Encoding; Energy consumption; Hardware; Parallel architectures; Throughput; Wire; Packet Classification; Packet-Side Key Encoding; Range Encoding;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Local Computer Networks, 2009. LCN 2009. IEEE 34th Conference on
  • Conference_Location
    Zurich
  • Print_ISBN
    978-1-4244-4488-5
  • Electronic_ISBN
    978-1-4244-4487-8
  • Type

    conf

  • DOI
    10.1109/LCN.2009.5355199
  • Filename
    5355199