A compact analytic model for the breakdown distribution of gate stack dielectrics

Recently, the cell-based model of breakdown percolation has been generalized to deal with multilayer gate dielectric stacks. In this work, we depart from the cell-based model to derive a simple analytic compact model for the cumulative failure distribution of dual-layer stack dielectrics in terms of five parameters. The model is validated by large sample size experiments on PFET and NFET transistors with different areas. The model is also applied to single-layer oxides showing progressive breakdown, thus showing that this is a general tool for the reliability assessment of advanced gate dielectrics.