Title :
A submicron, double level metal process for high density memory applications
Author :
Whitwer, Fred ; Milligan, Don ; Garner, Jim ; Sun, Sey-Ping ; Shenasa, Mohsen ; Davies, Tad ; Lage, Craig
Author_Institution :
Nat. Semicond. Corp., Puyallup, WA, USA
Abstract :
A process is described that was developed for application to a 1-Mb SRAM product. This highly reliable, very dense interconnect process features tungsten metal-1 and spin-on-glass (SOG) etchback planarization. The tungsten metal layer provides excellent step coverage with good electromigration resistance. The tungsten patterning process results in very little etch bias and anisotropic etch profiles. Details relating to both metallization and planarization are discussed. The results of electrical characterization and reliability testing are presented
Keywords :
BIMOS integrated circuits; SRAM chips; aluminium alloys; circuit reliability; electromigration; integrated circuit technology; metallisation; sputter etching; tungsten; 1 Mbit; Al alloy; BiCMOS process; SOG etchback planarization; SRAM; W metal layer; anisotropic etch profiles; dense interconnect process; electrical characterization; electromigration resistance; high density memory; metallization; patterning process; planarization; reliability testing; spin-on-glass; step coverage; submicron double level metal process; Adhesives; Aluminum alloys; Lithography; Optical films; Planarization; Random access memory; Smoothing methods; Sputter etching; Surfaces; Tungsten;
Conference_Titel :
VLSI Multilevel Interconnection Conference, 1990. Proceedings., Seventh International IEEE
Conference_Location :
Santa Clara, CA
DOI :
10.1109/VMIC.1990.127842
