Title :
Laser defect correction applications to FPGA based custom computers
Author :
Chapman, G.H. ; Dufort, Benoit
Author_Institution :
Sch. of Eng. Sci., Simon Fraser Univ., Burnaby, BC, Canada
Abstract :
The complexity and speed of monolithic FPGA based custom computers has been set by the presence of defective sections which limit chip area. Test FPGAs show that laser link defect avoidance routing around flawed blocks generates delays <50% of active switches, making the error cell distribution nearly invisible
Keywords :
computer architecture; fault tolerant computing; field programmable gate arrays; laser beam applications; monolithic integrated circuits; reliability; active switches; chip area; complexity; defective sections; delays; error cell distribution; flawed blocks; laser defect correction applications; laser link defect avoidance routing; monolithic FPGA based custom computers; speed; test FPGAs; Application software; CMOS technology; Delay; Field programmable gate arrays; Laser applications; Laser beam cutting; Laser theory; Routing; Switches; Testing;
Conference_Titel :
Field-Programmable Custom Computing Machines, 1997. Proceedings., The 5th Annual IEEE Symposium on
Conference_Location :
Napa Valley, CA
Print_ISBN :
0-8186-8159-4
DOI :
10.1109/FPGA.1997.624626
