Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs

Author

Morassi, L. ; Verzellesi, G. ; Padovani, A. ; Larcher, L. ; Pavan, P. ; Veksler, D. ; Ok, Injo ; Bersuker, G.

Author_Institution

DISMI, Univ. of Modena & Reggio Emilia, Modena, Italy

fYear

2010

fDate

2-6 May 2010

Firstpage

532

Lastpage

535

Abstract

Interface-trap effects are analyzed in inversion-type, self-aligned In_0.53Ga_0.47As and In_0.53Ga_0.47As/ In_0.2Ga_0.8As MOSFETs with ALD ZrO₂ gate dielectric. Interface-trap densities in the order of 10¹³ cm^-2 eV^-1 are required to explain the measured subthreshold slopes. For these D_it values, donor-like interface traps are compatible with threshold-voltage values in the 0-0.15 V range as those observed in these devices. Moreover, the presence of donor-like interface traps can explain the negative V_T shift induced by the inclusion of the In_0.2Ga_0.8As cap layer, as the result of the influence of interface traps located at the In_0.2Ga_0.8As/ZrO₂ interface on the inversion channel forming at the In_0.53Ga_0.47As/In_0.2Ga_0.8As interface.

Keywords

III-V semiconductors; MOSFET; gallium arsenide; high-k dielectric thin films; indium compounds; interface states; semiconductor device models; zirconium compounds; ALD ZrO₂ gate dielectric; InGaAs-ZrO₂; cap layer; donor-like interface traps; high-k dielectric; interface-trap effect analysis; inversion-type MOSFET; negative voltage shift; threshold-voltage value; voltage 0 V to 0.15 V; CMOS technology; Density measurement; Dielectric measurements; High-K gate dielectrics; III-V semiconductor materials; Indium compounds; Indium gallium arsenide; Indium phosphide; Leakage current; MOSFETs; III-V MOSFETs; InGaAs; high-k dielectric; interface traps; numerical simulation;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium (IRPS), 2010 IEEE International

Conference_Location

Anaheim, CA

ISSN

1541-7026

Print_ISBN

978-1-4244-5430-3

Type

conf

DOI

10.1109/IRPS.2010.5488774

Filename

5488774