DocumentCode
2698857
Title
A novel TCAD-based methodology to minimize the impact of parasitic structures on ESD performance
Author
Olson, Nicholas ; Boselli, Gianluca ; Salman, Akram ; Rosenbaum, Elyse
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA
fYear
2010
fDate
2-6 May 2010
Firstpage
474
Lastpage
479
Abstract
During an ESD event, breakdown of a parasitic bipolar transistor can lead to chip failure. For a variety of ESD protection networks, it is demonstrated that TCAD simulations correctly predict the stress level at which failure occurs due to bipolar breakdown. A procedure to characterize the interaction between any two N-type diffusions and the ESD cells to which they are connected is presented.
Keywords
bipolar transistors; electrostatic discharge; technology CAD (electronics); ESD protection networks; N-type diffusions; TCAD simulation; bipolar breakdown; parasitic bipolar transistor structure; BiCMOS integrated circuits; Bipolar transistors; Clamps; Electric breakdown; Electrostatic discharge; Protection; Silicon; Stress; Testing; Voltage; ESD; Electrostatic Discharge; Parasitic Bipolar; TCAD;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium (IRPS), 2010 IEEE International
Conference_Location
Anaheim, CA
ISSN
1541-7026
Print_ISBN
978-1-4244-5430-3
Type
conf
DOI
10.1109/IRPS.2010.5488784
Filename
5488784
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