DocumentCode :
2699065
Title :
Novel isolation process using selective polysilicon filled trench technology for high speed bipolar circuits
Author :
Sundaram, S.L. ; Vasquez, B. ; Zdebel, P.J.
Author_Institution :
Motorola Inc, Mesa, AZ, USA
fYear :
1990
fDate :
17-18 Sep 1990
Firstpage :
26
Lastpage :
28
Abstract :
Zero encroachment variable-width trench isolation (ZERO) with selective polycrystalline refill has been developed for emitter coupled logic (ECL) circuits. Subsequent oxidation of the selective polysilicon film produces a box-type oxide isolation with vertical sidewalls, no faceting, and zero encroachment. From the planarization point of view, selective polysilicon growth reduces the process complexity of LPCVD (low-pressure chemical vapor deposition) polysilicon-filled single-width trench technology. The selective polysilicon growth also facilitates variable-width trench isolation. Furthermore, it eliminates the faceting problem associated with selective monosilicon trench refill. Bipolar devices were built with variable-width trenches of 1 μm depth. Gate delay performance was improved by 40-45% as compared to recessed LOCOS isolated circuits
Keywords :
bipolar integrated circuits; emitter-coupled logic; integrated circuit technology; oxidation; 1 micron; ECL circuits; box-type oxide isolation; emitter coupled logic; gate delay performance; high speed bipolar circuits; isolation process; oxidation; planarization; selective polysilicon filled trench technology; variable-width trenches; vertical sidewalls; zero encroachment variable width trench isolation; Chemistry; Circuits; Delay; Dielectric films; Inductors; Isolation technology; Parasitic capacitance; Semiconductor films; Silicon; Temperature;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Bipolar Circuits and Technology Meeting, 1990., Proceedings of the 1990
Conference_Location :
Minneapolis, MN
Type :
conf
DOI :
10.1109/BIPOL.1990.171118
Filename :
171118
Link To Document :
بازگشت