Title :
Double-level copper interconnections using selective copper CVD
Author :
Awaya, Nobuyoshi ; Ohono, Kazuhide ; Sato, Masaaki ; Arita, Yoshinobu
Author_Institution :
NTT LSI Lab., Kanagawa, Japan
Abstract :
A study is made of selective copper chemical vapor deposition (CVD) using hydrogen reduction of bis-hexafluoro acetylacetonate copper to fill vias of double-level copper interconnections. The surface morphology of the selectively deposited copper on the substrate copper in the via bottom depends strongly on the via opening process. The two-step via opening process comprising reactive ion etching of the insulating interlayer and wet removal of the interlayer metal results in smooth copper plug formation by CVD. Double-level copper interconnection is demonstrated using this technique. Electrical measurement showed that the via resistance of a 1-μm hole was about 100 mΩ
Keywords :
CVD coatings; copper; metallisation; sputter etching; 1 micron; Cu; bis-hexafluoro acetylacetonate copper; chemical vapor deposition; double-level copper interconnections; electrical measurement; hydrogen reduction; insulating interlayer; plug formation; reactive ion etching; selective copper CVD; surface morphology; via bottom; via opening process; via resistance; vias; wet removal; Chemical vapor deposition; Copper; Electric resistance; Electric variables measurement; Electrical resistance measurement; Hydrogen; Insulation; Plugs; Surface morphology; Wet etching;
Conference_Titel :
VLSI Multilevel Interconnection Conference, 1990. Proceedings., Seventh International IEEE
Conference_Location :
Santa Clara, CA
DOI :
10.1109/VMIC.1990.127874