Characterization of Gate-All-Around Si-NWFET, including Rsd, cylindrical coordinate based 1/f noise and hot carrier effects

In this paper, we introduce the cylindrical coordinate based flicker noise model for Silicon NanoWire Field Effect Transistor (Si-NWFET) with Gate-All-Around (GAA) structure. For the accurate extraction of the volume trap density, N_t, with 1/f noise modeling, the parameters which represent the intrinsic channel properties are determined by rejecting the series resistance R_sd effect. Due to the random distribution of traps in Si-NWFETs, the 1/f noise data are obtained by averaging the drain current power spectral density, S_id, for several devices. By using the proposed 1/f model, the extracted volume trap density is compared for three different oxide processes (ISSG/RTO/GNOx) and verified by hot carrier stress test.