DocumentCode :
2700089
Title :
PBTI relaxation dynamics after AC vs. DC stress in high-k/metal gate stacks
Author :
Zhao, K. ; Stathis, J.H. ; Kerber, A. ; Cartier, E.
Author_Institution :
IBM Res. Div., T. J. Watson Res. Center, Yorktown Heights, NY, USA
fYear :
2010
fDate :
2-6 May 2010
Firstpage :
50
Lastpage :
54
Abstract :
A detailed study on PBTI relaxation after AC and DC stress in high-k nFETs is reported. First, Vt shift during AC and DC stress are examined, showing that the PBTI time evolution depends on the stress mode due to the relaxation effect. Then, comparison of relaxation after different stress types reveals large difference in the relaxation behavior at short times, whereas AC and DC relaxation are observed to merge at longer times. The “time-to-merge” rapidly increases with stress time and it strongly depends on the duty cycle. From a series of “Stress-Relax-Stress” measurement, we also demonstrate that the charge trapping and de-trapping process are highly correlated through “trap level”. A simple model from a trap distribution point of view is proposed to rationalize the above observations. These observations provide new insight into the trapping dynamics during PBTI.
Keywords :
field effect transistors; high-k dielectric thin films; semiconductor device reliability; AC stress; DC stress; PBTI time evolution; charge trapping; duty cycle; high-k gate stacks; high-k nFET; metal gate stacks; positive bias temperature instability; relaxation effect; stress-relax-stress measurement; Charge measurement; Circuits; Current measurement; Degradation; Electron traps; High K dielectric materials; High-K gate dielectrics; Life estimation; Space charge; Stress measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability Physics Symposium (IRPS), 2010 IEEE International
Conference_Location :
Anaheim, CA
ISSN :
1541-7026
Print_ISBN :
978-1-4244-5430-3
Type :
conf
DOI :
10.1109/IRPS.2010.5488855
Filename :
5488855
Link To Document :
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