DocumentCode :
2700245
Title :
Code simulation concept for S/390 processors using an emulation system
Author :
Koerner, Stefan
Author_Institution :
IBM Dev. Lab. Boeblingen, Germany
fYear :
2000
fDate :
2000
Firstpage :
101
Lastpage :
102
Abstract :
An innovative simulation concept has been developed for the IBM S/390 system of the year 2000 in the area of microcode verification. The goal is to achieve a long-term improvement in the quality of the delivered microcode, detecting and solving the vast majority of code problems in simulation before the system is first powered on. The number of such problems has a major impact on the time needed during system integration to bring the system up from power on to general availability. Within IBM, this is the first time that much a code simulation concept has been developed and implemented. Our element of that concept is the usage of a large emulation system for hardware/software co-verification
Keywords :
firmware; formal verification; hardware-software codesign; S/390 processors; code simulation concept; emulation system; hardware/software co-verification; innovative simulation concept; large emulation system; microcode verification; Emulation; Hardware; Laboratories; Logic gates; Microprogramming; Parallel processing; Power system modeling; Process design; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High-Level Design Validation and Test Workshop, 2000. Proceedings. IEEE International
Conference_Location :
Berkeley, CA
Print_ISBN :
0-7695-0786-7
Type :
conf
DOI :
10.1109/HLDVT.2000.889568
Filename :
889568
Link To Document :
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