Title :
Enhanced selective tungsten encapsulation of TiW capped aluminum interconnect
Author :
Dalton, Charles M.
Author_Institution :
Harris Semicond., Melbourne, FL, USA
Abstract :
With the use of the encapsulation barrier metal technique, the metal 1 thickness can be reduced due to the structure´s high resistance to electromigration. With the thinning of metal 1, the thickness of the interlevel dielectric can be reduced within capacitance constraints with minimal concern for hillocking during the oxide deposition. With the thinning of metal 1, the interlevel deposition topography becomes more planar. This process enhancement permits the use of selective tungsten plugging of vias in that the tungsten fluorine barrier acts as a seed layer at the base of the via. This technique can be used in an n-level metalization process by repeating the metal 1 encapsulation process on subsequent metal interconnect levels
Keywords :
aluminium; electromigration; encapsulation; metallisation; titanium compounds; tungsten; W-TiW-Al; capacitance constraints; electromigration; encapsulation barrier metal technique; encapsulation process; hillocking; interlevel deposition topography; interlevel dielectric; n-level metalization process; plugging; seed layer; Aluminum; Contact resistance; Dielectrics; Electromigration; Encapsulation; Integrated circuit interconnections; Reflectivity; Resists; Temperature; Tungsten;
Conference_Titel :
VLSI Multilevel Interconnection Conference, 1990. Proceedings., Seventh International IEEE
Conference_Location :
Santa Clara, CA
DOI :
10.1109/VMIC.1990.127879