DocumentCode :
2701031
Title :
Advances in production methods in VLSI and ULSI technology using isolated-chamber sputter deposition of Al 1% Si films
Author :
Ahn, Y.K. ; Oh, C.S. ; Hwang, W.J. ; Koh, J.W. ; Song, Y.W. ; Cho, G.S. ; Ko, C.G. ; Harra, D.J. ; Kim, Y.K. ; van Gogh, J. ; Shin, C.H.
Author_Institution :
Hyundai Electron. Ind. Co. Ltd., Ichon-kun, South Korea
fYear :
1990
fDate :
12-13 Jun 1990
Firstpage :
325
Lastpage :
328
Abstract :
Sputtering process optimization is described as related to steady-state production of VLSI and ULSI devices using isolated deposition modules in a production environment. Improvements in step coverage for Al-1%-Si, obtained over VLSI and ULSI level topology typical of 1-Mb to 16-Mb semiconductor devices, are described, and data are presented. Techniques for improving the average step coverage and the worst-case step coverage over 1-μm-thick BPSG contact openings are discussed. The process improvements require the use of isolated processing chambers for specific processing steps in the appropriate chambers. By taking advantage of the isolated processing chambers and fine tuning various process settings, the worst-case step coverage was improved from 25 to 40% for a typical VLSI topology. These techniques were also effective in reducing step coverage over opposing contact-opening sidewalls across the wafer. The factors and deposition conditions responsible for these improvements are presented. Corresponding data on grain size and silicon nodule size as a function of deposition conditions after contact alloy are presented
Keywords :
VLSI; aluminium alloys; integrated circuit technology; metallisation; silicon alloys; sputtered coatings; AlSi; BPSG contact openings; ULSI; VLSI; average step coverage; contact-opening sidewalls; grain size; isolated deposition modules; isolated-chamber sputter deposition; nodule size; production methods; step coverage; worst-case step coverage; Grain size; Isolation technology; Optimized production technology; Semiconductor devices; Silicon; Sputtering; Steady-state; Topology; Ultra large scale integration; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Multilevel Interconnection Conference, 1990. Proceedings., Seventh International IEEE
Conference_Location :
Santa Clara, CA
Type :
conf
DOI :
10.1109/VMIC.1990.127886
Filename :
127886
Link To Document :
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