Tunnel oxide degradation in TANOS devices and its origin

Author

Park, H. ; Bersuker, G. ; Jo, M. ; Veksler, D. ; Lim, K.Y. ; Gilmer, D. ; Goel, N. ; Kang, C.Y. ; Young, C. ; Chang, M. ; Hwang, H. ; Tseng, H.-H. ; Kirsch, P.D. ; Jammy, R.

fYear

2010

fDate

26-28 April 2010

Firstpage

50

Lastpage

51

Abstract

Tunnel oxide degradation in TANOS devices and its origins were investigated in terms of program, erase, and endurance device operation modes. It was found that the erase operation may cause significant tunnel oxide degradation, while the degradation due to program operation is negligible. In the erase and endurance modes, tunnel oxide degradation is primarily controlled by the process of electron ejection from the SiN trapping layer to the substrate.

Keywords

aluminium compounds; field effect transistors; silicon compounds; tantalum compounds; tunnelling; TANOS device; TaN-Al₂O₃-Si₃N₄-SiO₂; electron ejection process; endurance device operation modes; endurance modes; erase operation; nFET device; substrates; trapping layer; tunnel oxide degradation; Degradation; Doping; Electron traps; Noise generators; Noise measurement; Performance evaluation; Pulse generation; Pulse measurements; Silicon compounds; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology Systems and Applications (VLSI-TSA), 2010 International Symposium on

Conference_Location

Hsinchu

ISSN

1524-766X

Print_ISBN

978-1-4244-5063-3

Electronic_ISBN

1524-766X

Type

conf

DOI

10.1109/VTSA.2010.5488954

Filename

5488954