• DocumentCode
    2701392
  • Title

    Impacts of multiple-gate configuration on characteristics of poly-Si nanowire SONOS devices

  • Author

    Hsu, Hsing-Hui ; Huang, Shuan-Yun ; Su, Chun-Jung ; Lin, Horng-Chih ; Huang, Tiao-Yuan

  • Author_Institution
    Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan
  • fYear
    2010
  • fDate
    26-28 April 2010
  • Firstpage
    42
  • Lastpage
    43
  • Abstract
    In this study, we have proposed a simple but novel way to fabricate poly-Si NW-SONOS devices. With a slight modification in the fabrication procedure, three types of devices having various gate configurations (SG, ΩG, and GAA) were successfully fabricated and characterized. The experimental results unambiguously show that, owing to the superior gate controllability over NW channels, much improved transfer characteristics are achieved with the GAA devices as compared with the other types of devices. Moreover, GAA devices also exhibit the best memory characteristics among all splits, highlighting the potential of such scheme for future SONOS applications.
  • Keywords
    elemental semiconductors; flash memories; nanoelectronics; nanowires; random-access storage; silicon; GAA devices; Si; gate-all-around structures; multiple gate configuration impact; omega-gate structures; polySi NW-SONOS devices; polySi nanowire SONOS device fabrication; side-gate structures; Anisotropic magnetoresistance; Controllability; Electronic mail; Etching; Fabrication; Laboratories; Nanoscale devices; SONOS devices; Temperature measurement; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology Systems and Applications (VLSI-TSA), 2010 International Symposium on
  • Conference_Location
    Hsinchu
  • ISSN
    1524-766X
  • Print_ISBN
    978-1-4244-5063-3
  • Electronic_ISBN
    1524-766X
  • Type

    conf

  • DOI
    10.1109/VTSA.2010.5488955
  • Filename
    5488955