DocumentCode
2701513
Title
Formation of tungsten MOS gate structures using an integrated RTO/PVD process
Author
Cooper, C.B. ; Delfino, M. ; Fair, J. ; Felch, S. ; Hodul, D. ; McFarland, R.
Author_Institution
Varian Res. Center, Palo Alto, CA, USA
fYear
1990
fDate
12-13 Jun 1990
Firstpage
342
Lastpage
344
Abstract
Tungsten metal gate structures formed with air exposure between the process steps were compared to those formed using integrated sequences where the wafer was passed in vacuum (1E-7 torr) between steps. The wafers used were 150-mm, <100>, p-type silicon with bulk resistivity of 3-9 Ω-cm. All oxidations were done within 15 min of the HF dip used to remove the native oxide. Tungsten metal capacitors formed on thin silicon dioxide showed improvement in breakdown field and fixed oxide charge density when the samples were handled under vacuum between the oxidation and metal deposition steps. Annealing after metal deposition lowered the sheet resistance of the film as well as the fixed oxide charge density
Keywords
metal-insulator-semiconductor devices; oxidation; plasma deposition; silicon; silicon compounds; tungsten; HF dip; W-SiO2-Si; air exposure; annealing; breakdown field; bulk resistivity; fixed oxide charge density; integrated sequences; metal capacitors; oxidations; sheet resistance; wafers; Annealing; Atherosclerosis; Conductivity; Hafnium; MOS capacitors; Oxidation; Rapid thermal processing; Silicon compounds; Tungsten; Vacuum breakdown;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Multilevel Interconnection Conference, 1990. Proceedings., Seventh International IEEE
Conference_Location
Santa Clara, CA
Type
conf
DOI
10.1109/VMIC.1990.127891
Filename
127891
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