3D analysis of flip chip interconnection using FIB-SEM slice and view

Three dimensional SEM observation was performed for the flip chip bump interconnection analysis. A commercial tablet PC was torn down and the application processor was cut out, which was used as the evaluation sample. It seemed that the interconnection was Cu pillar with solder cap bump and Cu trace on the substrate joint by thermal compression bonding process with pre-applied underfill resin. The three dimension view was made from 240 images which were taken by the repetition of FIB process and SEM observation at 200 nm pitch. This analysis revealed clearly that the joint of application processor as bought had filler entrapment and a lot of void. The joint aspect has been changed significantly by 1000 times thermal cycle test between -55 and 125°C. Generation of a lot of void at the interface of the pillar Cu and the formed intermetallic was also clearly observed by this method.