• DocumentCode
    270238
  • Title

    Cu Wire resistance improvement using Mn-based Self-Formed Barriers

  • Author

    Siew, Y.K. ; Jourdan, Nicolas ; Ciofi, I. ; Croes, Kristof ; Wilson, Christopher J. ; Tang, B.J. ; Demuynck, S. ; Wu, Zhisheng ; Ai, H. ; Cellier, D. ; Cockburn, A. ; Bömmels, J. ; Tökei, Zsolt

  • Author_Institution
    Imec vzw, Leuven, Belgium
  • fYear
    2014
  • fDate
    20-23 May 2014
  • Firstpage
    311
  • Lastpage
    314
  • Abstract
    Cu wire resistance reduction using CVD Mn-based Self-Formed Barrier (SFB) compared to conventional PVD barrier was investigated at 40 and 100 nm half pitch (HP). Mn-based SFB leads to both (1) maximum fractional Cu area in the trenches and (2) Cu resistivity reduction at scaled dimensions. This represents a breakthrough for future interconnect scaling. Blanket Cu experiments suggest that the Cu resistivity reduction in the case of Mn-based SFB can be attributed to lower surface scattering at the dielectric/Cu interface. Finally, promising reliability has been demonstrated in 20 nm HP single damascene (SD) SiO2 trenches integrated with Mn-based SFB.
  • Keywords
    copper; electrical resistivity; integrated circuit interconnections; manganese; silicon compounds; vapour deposition; CVD Mn-based self-formed barrier; Cu; Cu wire resistance reduction; HP single damascene SiO2 trenches; Mn; PVD barrier; SFB; SiO2; dielectric-Cu interface; half pitch; interconnect scaling; resistivity reduction; scaled dimensions; size 100 nm; size 40 nm; surface scattering; Abstracts; Conductivity; Lead; Manganese; Reliability; Three-dimensional displays;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Interconnect Technology Conference / Advanced Metallization Conference (IITC/AMC), 2014 IEEE International
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    978-1-4799-5016-4
  • Type

    conf

  • DOI
    10.1109/IITC.2014.6831895
  • Filename
    6831895