• DocumentCode
    2703138
  • Title

    Structural test of power-only defects: ATPG or ad-hoc?

  • Author

    Wang, Baosheng ; Giles, Grady ; Rajaraman, Jayalakshmi ; Sobti, Kanwaldeep ; Losli, Derrick ; Elvey, Dwight ; Fitzgerald, Jeff ; Walther, Ron ; Rearick, Jeff

  • Author_Institution
    Advanced Micro Devices, Inc., 1AMD Pl., Sunnyvale, CA 94086, USA
  • fYear
    2009
  • fDate
    1-6 Nov. 2009
  • Firstpage
    1
  • Lastpage
    1
  • Abstract
    Power-only defects do not cause logical failures in a chip but induce more power consumption. For battery-driven semiconductor chips and others with military-level quality requirements, power-only defects have to be screened out during manufacturing test. To reduce the associated test cost, structural test of those defects is a must. With a dedicated example, this paper demonstrates two methods to structurally detect such defects, i.e., testing them along with regular ATPG vectors and creating a special test mode for detection. This paper also compares the two proposals based on different tradeoff requirements. Finally, it summarizes general criteria for selecting structural test methods for detecting those power-only defects.
  • Keywords
    Automatic control; Automatic test pattern generation; Circuit testing; Clocks; Costs; Energy consumption; Master-slave; Semiconductor device manufacture; Semiconductor device testing; Target recognition;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 2009. ITC 2009. International
  • Conference_Location
    Austin, TX, USA
  • Print_ISBN
    978-1-4244-4868-5
  • Electronic_ISBN
    978-1-4244-4867-8
  • Type

    conf

  • DOI
    10.1109/TEST.2009.5355605
  • Filename
    5355605