DocumentCode
2703841
Title
Regression-based macromodeling for delay estimation of behavioral components
Author
Macii, A. ; Macii, E. ; Odasso, G. ; Poncino, M. ; Scarsi, R.
Author_Institution
Dipt. di Autom. e Inf., Politecnico di Torino, Italy
fYear
1999
fDate
4-6 Mar 1999
Firstpage
188
Lastpage
191
Abstract
This paper presents a methodology for delay estimation of hardware components described at the behavioral-level. The basis of the proposed technique is a well-known theoretical result that relates the entropy of a logic function to the delay of a multi-level implementation of the same function. We propose an improved model for delay estimation, and we prove its validity by means of experiments performed on a set of standard benchmarks
Keywords
VLSI; delay estimation; entropy; hardware description languages; high level synthesis; multivalued logic circuits; statistical analysis; HDLs; behavioral components; delay estimation; digital IC design; entropy; high-level design; logic function; multi-level implementation; regression-based macromodeling; standard benchmarks; Boolean functions; Delay estimation; Design automation; Design optimization; Electronic design automation and methodology; Entropy; Hardware design languages; Humans; Logic functions; Logic gates;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI, 1999. Proceedings. Ninth Great Lakes Symposium on
Conference_Location
Ypsilanti, MI
ISSN
1066-1395
Print_ISBN
0-7695-0104-4
Type
conf
DOI
10.1109/GLSV.1999.757407
Filename
757407
Link To Document