Title :
GasP control for domino circuits
Author :
Ebergen, Jo ; Gainsley, Jonathan ; Lexau, Jon ; Sutherland, Ivan
Abstract :
We present two novel asynchronous control circuits for domino pipelines. The control circuits are based on GasP circuits, have a minimum cycle time of six gate delays, and compare favorably with previously published control circuits. We present some results from a chip implementation of several 64-bit domino adders in a TSMC CMOS 180 nm process technology.
Keywords :
CMOS logic circuits; adders; asynchronous circuits; pipeline arithmetic; 180 nm; 64 bit; CMOS; GasP control circuits; asynchronous control circuits; domino adders; domino pipeline circuits; multiple gate delay minimum cycle time; Adders; CMOS process; Circuits; Delay effects; Laboratories; Latches; MOSFETs; Pipelines; Sun; Wires;
Conference_Titel :
Asynchronous Circuits and Systems, 2005. ASYNC 2005. Proceedings. 11th IEEE International Symposium on
Print_ISBN :
0-7695-2305-6
DOI :
10.1109/ASYNC.2005.21
