Crack initiation and growth in electronic packages

Electronic packages usually consist of bonded materials with different thermal and mechanical properties. The bonding interfaces of such devices near the free edge or near the junction of dissimilar materials suffer from high stress gradients due to the presence of thermal and stiffness mismatch of bonded materials. These high stress gradients may initiate cracks at such locations. Also, minor impurities or dust particles embedded between the die and the substrate are pyrolyzed during bonding, leading to formation of gas bubbles in the die-attach. In addition, moisture may enlarge these defects. Therefore, interfaces of dissimilar materials are prone to crack initiations, which lead to delaminations. Such defects result in an increase in thermal resistance from the chip to the substrate. It is therefore necessary to develop an in-depth understanding of the analytical modeling of the interface separating two dissimilar materials. Predictions of the location and onset of failure could then be made through a more accurate stress analysis in conjunction with the application of fracture mechanics concepts. In this study, in lieu of postulating the existence of a crack at an arbitrary location, the possible failure sites are determined by applying a theory that examines the local strain energy density field. The singular fields associated with junction(s) of materials or a bimaterial interface with a free edge including cracks are accurately represented by developing a global element. The global element captures the singular behavior of stress fields near the crack tips exactly. Since the stress intensity factors for a bimaterial interface do not have a simple physical interpretation, as in the homogeneous case, a more meaningful parameter for the present case is the energy release rate computed using its J-integral representation within the global element of global-local finite element analysis