DocumentCode
2704248
Title
Intel® IBIST, the full vision realized
Author
Nejedlo, Jay ; Khanna, Rahul
Author_Institution
Intel Corp., Hillsboro, OR, USA
fYear
2009
fDate
1-6 Nov. 2009
Firstpage
1
Lastpage
11
Abstract
Third generation Intel®IBIST (IBIST) is the first full featured edition of what was originally envisioned in 1999. The objective was to create a standard infrastructure for validating, debugging, and testing high speed IOs (Input/Output) which could be supported by a common software toolset. This vision was realized in 2009 on Intel products. The IBIST methodology has become a standard at Intel. Today, IBIST is utilized from the very beginning of the product verification including initial power-on silicon debug. It a staple throughout the back-end product validation process and is also utilized in end-customer validation and high volume testing. Intel´s platform reliability, availability, serviceability(collectively referred to as RAS) architecture exploits the technology on a number of fronts as well. The content of this paper includes an overview of the problems which mandated this paradigm shift away from the historical IO testing methodologies, an IBIST architectural overview, and the key application spaces addressed by this technology.
Keywords
built-in self test; electronic engineering computing; IO debugging; IO testing; IO validation; Intel IBIST; availability; back-end product validation; initial power-on silicon debug; product verification; reliability; serviceability; Automatic control; Automatic testing; Built-in self-test; Logic testing; Production facilities; Protocols; Silicon; Space technology; System testing; Topology;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2009. ITC 2009. International
Conference_Location
Austin, TX
Print_ISBN
978-1-4244-4868-5
Electronic_ISBN
978-1-4244-4867-8
Type
conf
DOI
10.1109/TEST.2009.5355667
Filename
5355667
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