• DocumentCode
    2704371
  • Title

    Boundary-scan adoption - an industry snapshot with emphasis on the semiconductor industry

  • Author

    Geiger, Philip B. ; Butkovich, Steve

  • Author_Institution
    Dell Inc., Austin, TX, USA
  • fYear
    2009
  • fDate
    1-6 Nov. 2009
  • Firstpage
    1
  • Lastpage
    10
  • Abstract
    Increasing circuit densities and speeds are quickly reducing electrical test point access for printed circuit assembly test. Boundary-scan (JTAG/IEEE 1149.x) is a technology that will allow continued testability of printed circuit assemblies, but its use requires that it be designed into semiconductor devices. Currently, not all semiconductor suppliers support boundary-scan. Wider availability of complying devices is necessary to enable cost-efficient and effective board test for future designs. This paper presents the results of a boundary-scan survey developed by the International Electronics Manufacturing Initiative (iNEMI). The survey was intended to gauge the current adoption rate of boundary-scan, identify any impediments to widespread use, and select areas for future research.
  • Keywords
    boundary scan testing; printed circuit layout; printed circuit testing; semiconductor industry; International Electronics Manufacturing Initiative; JTAG/IEEE 1149.x; boundary-scan testing; current adoption rate; electrical test point access; printed circuit assembly test; semiconductor industry; Assembly; Circuit testing; Electronics industry; Manufacturing industries; Printed circuits; Production systems; Semiconductor device manufacture; Semiconductor device testing; System testing; Systems engineering and theory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 2009. ITC 2009. International
  • Conference_Location
    Austin, TX
  • Print_ISBN
    978-1-4244-4868-5
  • Electronic_ISBN
    978-1-4244-4867-8
  • Type

    conf

  • DOI
    10.1109/TEST.2009.5355673
  • Filename
    5355673