• DocumentCode
    2704389
  • Title

    A low cost MCM-D process for flip chip and wirebonding applications

  • Author

    Perfecto, E.D. ; Master, Raj N.

  • Author_Institution
    IBM Microelectron., Hopewell Junction, NY
  • fYear
    1995
  • fDate
    21-24 May 1995
  • Firstpage
    1081
  • Lastpage
    1086
  • Abstract
    Multi-chip modules using deposited dielectric materials (MCM-D) have been produced at IBM Microelectronics Packaging Facility for over a decade. To take full advantage of this package, IBM uses flip chip technology to minimize the required substrate and silicon active area. The terminal or bonding metals for chip to substrate interconnection have been deposited by a variety of methods including electroplating and electroless plating combinations, and recently, stencil lift-off (L/O) of evaporated film. Here, the Cr/Cu/Ni/Au metallurgy was deposited not only on the interconnecting pad areas, but also on the redistribution lines. A selective deposition process was developed to eliminate the metal on the lines. Two terminal metallurgies were evaluated by this selective process, namely Cr/Cu/Ni/Au and Cr/Cu/Co/Au. This paper will cover interconnection aspects with respect to material/solder interaction of the IBM Controlled Collapse Chip Connection (C4) process with 97 Pb/3 Sn solder and wire bonding as practiced on terminal metal pads fabricated by a selective deposition process. Reliability evaluation of this new process and Co metallurgy will also be discussed
  • Keywords
    flip-chip devices; lead bonding; multichip modules; soldering; C4 process; Cr-Cu-Co-Au; Cr-Cu-Ni-Au; IBM Controlled Collapse Chip Connection; MCM-D process; PbSn; dielectric materials; electroless plating; electroplating; evaporated film; flip chip technology; interconnection; metallurgy; multi-chip modules; packaging; redistribution lines; reliability; selective deposition; solder; stencil lift-off; terminal metal pads; wire bonding; Bonding; Chromium; Costs; Dielectric materials; Dielectric substrates; Flip chip; Gold; Microelectronics; Packaging; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference, 1995. Proceedings., 45th
  • Conference_Location
    Las Vegas, NV
  • Print_ISBN
    0-7803-2736-5
  • Type

    conf

  • DOI
    10.1109/ECTC.1995.517825
  • Filename
    517825