DocumentCode :
2704435
Title :
Low power design of an acoustic echo canceller Gmdfα algorithm on dedicated VLSI architectures
Author :
Gailhard, S. ; Julien, N. ; Baganne, A. ; Martin, E.
Author_Institution :
LESTER, UBS Lab., France
fYear :
1999
fDate :
4-6 Mar 1999
Firstpage :
334
Lastpage :
335
Abstract :
The acoustic echo cancellation with adaptive filters is a computationally intensive problem that needs real time cost effective solutions for embedded systems. Low power optimized signal processing architectures are likely to provide such solutions in the future. In this paper, we present different real-time optimized architectures of the popular Gmdfα algorithm, obtained by an HLS CAD tool providing trade-off-between area and power dissipation.
Keywords :
VLSI; acoustic signal processing; adaptive filters; circuit CAD; digital signal processing chips; echo suppression; high level synthesis; low-power electronics; Gmdfα algorithm; HLS CAD tool; acoustic echo canceller; adaptive filters; area; computationally intensive problem; dedicated VLSI architectures; low power design; optimized signal processing architectures; power dissipation; real time cost effective solutions; Acoustic signal processing; Adaptive filters; Algorithm design and analysis; Costs; Echo cancellers; Embedded computing; Embedded system; Real time systems; Signal processing algorithms; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI, 1999. Proceedings. Ninth Great Lakes Symposium on
ISSN :
1066-1395
Print_ISBN :
0-7695-0104-4
Type :
conf
DOI :
10.1109/GLSV.1999.757447
Filename :
757447
Link To Document :
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