DocumentCode
2704454
Title
A low power differential bus utilizing novel split level bus technique
Author
Sundstrom, Ray ; Pham, Phuc ; Esgar, Dwight ; Petty, Cleon
Author_Institution
Motorola Inc., Mesa, AZ, USA
fYear
1990
fDate
17-18 Sep 1990
Firstpage
144
Lastpage
147
Abstract
A low-power differential bus utilizing a novel split level bus (SLB) technique is described. There are several inherent advantages with the SLB. The bus operates at full differential mode at all times so the receiver never detects an indeterminate state. There are no reference levels on the bus, allowing full common mode range. Making D and DB both passive or active at the same time can make the SLB appear similar to single-ended operation. This makes any present single-ended bus technique, such as future-bus arbitration, directly applicable to the SLB. The reduced power dissipated by the internal circuitry, and reduction in power supply pins, allow wider parts in the same package. The losses on the bus are reduced and the bus power remains constant for any number of drivers
Keywords
bipolar integrated circuits; driver circuits; emitter-coupled logic; integrated logic circuits; ECL configuration; future-bus arbitration; losses reduction; low power differential bus; single-ended operation; split level bus technique; Circuit noise; Circuit testing; Driver circuits; Frequency; Impedance; Logic circuits; Microprocessors; Power transmission lines; Switches; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Bipolar Circuits and Technology Meeting, 1990., Proceedings of the 1990
Conference_Location
Minneapolis, MN
Type
conf
DOI
10.1109/BIPOL.1990.171148
Filename
171148
Link To Document