X-alignment techniques for improving the observability of response compactors

Despite the advantages of performing response compaction in Integrated-Circuit (IC) testing, unknown response bits (x´s) inevitably reflect into loss in test quality. The distribution of these x´s within the captured response, which varies for each test pattern, directly impacts the number of scan cells observed through the response compactor. In this work, we propose a two-dimensional X-alignment technique in order to judiciously manipulate the distribution of x´s in the test response prior to its compaction. The controlled response manipulation is performed on a per pattern basis, in the form of scan chain delay and intra-slice rotate operations, and with the objective that x´s are aligned within as few scan slices and chains as possible. Consequently, a larger number of scan cells are observed after compaction for any test pattern. The computation of the control data, i.e., rotate and delay bits, is formulated as a MAX-SAT problem, and efficient heuristics are provided. The proposed technique is test set independent, leading to a generic, simple, and cost-effective hardware implementation. The X-alignment technique can be utilized with any response compactor to manipulate the x-distribution in favor of the compactor, thus improving the test quality.