Title :
A new interlayer formation technology for completely planarized multilevel interconnection by using LPD
Author :
Homma, T. ; Katoh, T. ; Yamada, Y. ; Shimizu, J. ; Murao, Y.
Abstract :
A description is given of a newly developed selective interlayer dielectrics formation technology to realize completely planarized multilevel interconnections. The technology uses liquid phase deposition (LPD) at extremely low temperature (~40°C). This technology has the capability to realize high density VLSIs such as logic devices beyond 100-kgate and memory devices beyond 16-Mb because of the low thermal stress and the excellent planarization characteristics. This technology eliminates key hole formation in spacings among wirings. Selective deposition is possible by LPD. Compared with conventional CVD films, the LPD-SiO2 film has excellent properties for interlayer dielectrics. A completely planarized two-level interconnection using the LPD technology is discussed
Keywords :
VLSI; integrated logic circuits; integrated memory circuits; metallisation; 16 Mbit; 40 C; ULSI; eliminates key hole formation; high density VLSIs; interlayer dielectrics; interlayer formation technology; liquid phase deposition; logic devices; low thermal stress; memory devices; planarization characteristics; planarized multilevel interconnection; planarized two-level interconnection; selective interlayer dielectrics formation technology;
Conference_Titel :
VLSI Technology, 1990. Digest of Technical Papers.1990 Symposium on
Conference_Location :
Honolulu, Hawaii, USA
DOI :
10.1109/VLSIT.1990.110979
