Title :
A new MOSFETs degradation induced by gate current in off-state condition
Author :
Yoshikawa, K. ; Arai, N. ; Mori, S. ; Kaneko, Y. ; Ohshima, Y. ; Narita, K. ; Araki, H.
Abstract :
A PMOSFET degradation phenomenon induced by gate current in the off-state condition was studied experimentally for single-drain and lightly-doped-drain (LDD) structures. It is found that scaling down the gate length causes the gate bias condition where the fastest degradation is observed to shift from a condition of maximum gate current to one of zero gate voltage. This indicates a new constraint for scaling PMOSFETs. The hot-electron induced punchthrough (HEIP) effect has been considered one of the serious constraints for utilizing the single-drain structure, as well as for high-voltage applications. Effective channel length can be reduced significantly by HEIP effects in the on-state condition, but once the off-state drain leakage current increases, the off-state stress becomes more severe than the on-state HEIP effect
Keywords :
hot carriers; insulated gate field effect transistors; HEIP effects; MOSFETs degradation; PMOSFET degradation phenomenon; channel length; gate bias condition; gate current; gate length; high-voltage applications; hot-electron induced punchthrough; lightly-doped-drain; off-state condition; off-state drain leakage current; single-drain;
Conference_Titel :
VLSI Technology, 1990. Digest of Technical Papers.1990 Symposium on
Conference_Location :
Honolulu, Hawaii, USA
DOI :
10.1109/VLSIT.1990.111014
