Title :
Stability of image processing neuro chips: spatial and temporal
Author :
Matsumoto, T. ; Kobayashi, H. ; Togawa, Y.
Author_Institution :
Dept. of Electr. Eng., Waseda Univ., Tokyo, Japan
Abstract :
It is noted that there are two stability issues in image processing neuro chips: the temporal stability issue due to the parasitic capacitors of an MOS process, and the spatial stability issue due to the parallel array structure of chips. The authors present a rigorous clarification of the spatial stability issue, and explicit `if´ and `only if´ conditions for the temporal and the spatial stability. Even though the spatial stability is stronger than the temporal stability, the set of parameter values for which the two stability issues disagree is of (Lebesgue) measure zero
Keywords :
CMOS integrated circuits; computerised picture processing; digital signal processing chips; neural nets; stability; CMOS IC; Lebesgue; computerised picture processing; image processing; measure zero; neural nets; neuro chips; parallel array; spatial stability; temporal stability; Capacitors; Circuits; Convolvers; Gaussian processes; Image converters; Image processing; Information science; Semiconductor device measurement; Stability; Voltage;
Conference_Titel :
Neural Networks, 1991., IJCNN-91-Seattle International Joint Conference on
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-0164-1
DOI :
10.1109/IJCNN.1991.155351
