Implementation of a flight trainer simulator using a microprocessor based network: a system architecture selection report

After a general introduction concerning flight simulator development problems and the goals of the study, functional and development requirements are specified and the needed computing capacity is evaluated. (The same methodology can be applied to any real-time embedded computer system.) Typical benchmarks are introduced and analytical expressions on the time spent on communication are explained for cases of common memory, Multibus II and VME. The conclusions indicate the preferred solution, why it was selected and intentions for continuation of this work in the immediate future. The methodology presented and the resulting solution provide a simple way for combining existing hardware elements to achieve a low-cost implementation