• DocumentCode
    2706218
  • Title

    A NAND structured cell with a new programming technology for highly reliable 5 V-only flash EEPROM

  • Author

    Kirisawa, R. ; Aritome, S. ; Nakayama, R. ; Endoh, Tetsuo ; Shirota, R. ; Masuoka, F.

  • fYear
    1990
  • fDate
    4-7 June 1990
  • Firstpage
    129
  • Lastpage
    130
  • Abstract
    A programming technology is proposed to improve the endurance and read retention characteristics of NAND-structured EEPROM cells programmed by Fowler-Nordheim tunneling of electrons. Erasing and writing are accomplished uniformly over the whole channel area instead of nonuniform erasing at the drain. To achieve programming over the whole channel area, a new device structure is also proposed. The high-voltage pulses can be easily generated on a chip from a single 5-V power supply because the direct current due to the avalanche breakdown does not flow. The gate length of the memory transistor is 1.0 μm. Using 1.0 μm rules, the cell size per bit is 11.7 μm2
  • Keywords
    EPROM; PLD programming; integrated memory circuits; tunnelling; 1.0 micron; 5 V; Fowler-Nordheim tunneling; NAND structured cell; avalanche breakdown; cell size; channel area; endurance; flash EEPROM; gate length; high-voltage pulses; memory transistor; programming technology; read retention characteristics;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 1990. Digest of Technical Papers.1990 Symposium on
  • Conference_Location
    Honolulu, Hawaii, USA
  • Type

    conf

  • DOI
    10.1109/VLSIT.1990.111042
  • Filename
    5727502
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2706218