Title :
A dynamic three-state memory cell for high-density associative processors
Author :
Herrmann, Frederick P. ; Keast, Craig L. ; Ishio, Keisuke ; Sodini, Charles G.
Abstract :
A dynamic associative processor cell is described which stores three states (0, 1, and X) and performs read, match, and masked-write functions. Five MOS transistors are used, including two dual-gate structures available in MIT´s CCD/CMOS technology. The dual-gate CCD (charge coupled device) transistors are used to reduce the spooning current, which can discharge the storage node through the write transistors. Experimental results show the functionality of the cell and an acceptable degradation with continuous spooning
Keywords :
CMOS integrated circuits; charge-coupled device circuits; insulated gate field effect transistors; integrated memory circuits; CCD/CMOS technology; MOS transistors; dual-gate CCD; dual-gate structures; dynamic three-state memory cell; functionality; high-density associative processors; masked-write functions; match functions; read functions; spooning current; storage node; write transistors;
Conference_Titel :
VLSI Circuits, 1990. Digest of Technical Papers., 1990 Symposium on
Conference_Location :
Honolulu, Hawaii, USA
DOI :
10.1109/VLSIC.1990.111101
