• DocumentCode
    2706930
  • Title

    Multi-emitter BiCMOS logic circuit family

  • Author

    Boudon, Gerard ; Mollier, Pierre ; Ong, Ieng ; Nuez, Jean Paul

  • fYear
    1990
  • fDate
    7-9 June 1990
  • Firstpage
    87
  • Lastpage
    88
  • Abstract
    It has been demonstrated that, in a 64-b carry look-ahead adder, the use of conventional half-micron BiCMOS circuits under a 3.6-V power supply gives 40% faster delay than the CMOS design. Up to 85% improvement is obtained with the new multiemitter BiCMOS circuit. A complete logic circuit family with the multiemitter concept is described, showing a maximum benefit on gates with a high number of inputs
  • Keywords
    BIMOS integrated circuits; adders; integrated logic circuits; 0.5 micron; 3.6 V; carry look-ahead adder; delay; gates; logic circuit; logic circuit family; multiemitter BiCMOS circuit;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits, 1990. Digest of Technical Papers., 1990 Symposium on
  • Conference_Location
    Honolulu, Hawaii, USA
  • Type

    conf

  • DOI
    10.1109/VLSIC.1990.111108
  • Filename
    5727541
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2706930