DocumentCode :
2707283
Title :
A new software tool for testability analysis of complex VLSI devices
Author :
Buonanno, G. ; Scuito, D.
Author_Institution :
Dipartimento di Elettronica, Politecnico di Milano, Italy
fYear :
1990
fDate :
8-10 May 1990
Firstpage :
560
Lastpage :
561
Abstract :
A testability analysis tool is presented that uses a set of testability conditions which allow qualitative evaluation of the testability of a VLSI device from the earliest phases of the circuit´s design. The tool is written in C and runs under MS-DOS and Unix. It has been used on a number of designs, giving good results that have been verified in practice
Keywords :
CMOS integrated circuits; VLSI; circuit analysis computing; integrated logic circuits; logic testing; C; CMOS; MS-DOS; Unix; circuit design; complex VLSI devices; qualitative evaluation; testability analysis; Algorithm design and analysis; Circuit faults; Circuit synthesis; Circuit testing; Observability; Performance evaluation; Process design; Software testing; Software tools; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
CompEuro '90. Proceedings of the 1990 IEEE International Conference on Computer Systems and Software Engineering
Conference_Location :
Tel-Aviv
Print_ISBN :
0-8186-2041-2
Type :
conf
DOI :
10.1109/CMPEUR.1990.113683
Filename :
113683
Link To Document :
بازگشت