DocumentCode :
2707663
Title :
Trace signal selection for debugging electrical errors in post-silicon validation
Author :
Liu, Xiao ; Xu, Qiang
Author_Institution :
Dept. of Comput. Sci.&Eng., Chinese Univ. of Hong Kong, Shatin, China
fYear :
2009
fDate :
1-6 Nov. 2009
Firstpage :
1
Lastpage :
1
Abstract :
Debugging electrical errors is the most challenging problem during the post-silicon validation process. We propose an automated trace signal selection methodology to facilitate this task, in which, by analyzing the layout of the circuit and carefully selecting trace signals, designers are with high probability to identify electrical errors.
Keywords :
integrated circuit layout; automated trace signal selection; circuit layout analysis; electrical errors debugging; post-silicon validation process; Circuit noise; Computer errors; Debugging; Error analysis; Hardware; Integrated circuit interconnections; Logic; Power supplies; Signal design; Signal processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 2009. ITC 2009. International
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4244-4868-5
Electronic_ISBN :
978-1-4244-4867-8
Type :
conf
DOI :
10.1109/TEST.2009.5355831
Filename :
5355831
Link To Document :
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