Title :
A wideband fractional-N frequency synthesizer with linearized coarse-tuned VCO for UHF/VHF mobile broadcasting tuners
Author :
Shin, Jaewook ; Kim, Jongsik ; Kim, Seungsoo ; Choi, Jeongki ; Kim, Namheung ; Eo, Yun Seong ; Shin, Hyunchol
Author_Institution :
Kwangwoon Univ., Seoul
Abstract :
A fractional-N frequency synthesizer with a fractional bandwidth of 67% for UHF/VHF-band mobile broadcasting tuners is presented. A novel linearized coarse tuned VCO with a pseudo-exponential capacitor bank structure is proposed to cover the wide bandwidth. The proposed technique successfully reduces the variation of KVCO and per-code frequency step by 2.7 and 2.1 times, respectively. For the divider and prescaler circuits, TSPC (true single-phase clock) structure is employed for high speed operation, low power consumption, and small silicon area. Implemented in 0.18-mum CMOS, the PLL covers 154 ~ 303 MHz (VHF) and 462 ~ 911 MHz (UHF) with a single VCO. The integrated phase noise is 0.807 and 0.910 degree for the integer-N and fractional-N modes, respectively, at 827.5-MHz output frequency. The in-band noise at 1 kHz offset is -95 dBc/Hz in the integer-N mode and degraded only by 3.8 dB in the fractional-N mode.
Keywords :
CMOS integrated circuits; UHF devices; VHF devices; frequency synthesizers; prescalers; voltage-controlled oscillators; CMOS intergated circuit; UHF-VHF mobile broadcasting tuners; divider circuits; frequency synthesizer; linearized coarse-tuned VCO; low power consumption; prescaler circuits; pseudoexponential capacitor bank structure; size 0.18 mum; true single-phase clock; voltage contolled oscillators; Bandwidth; Broadcasting; Capacitors; Clocks; Energy consumption; Frequency synthesizers; Tuners; VHF circuits; Voltage-controlled oscillators; Wideband;
Conference_Titel :
Solid-State Circuits Conference, 2007. ASSCC '07. IEEE Asian
Conference_Location :
Jeju
Print_ISBN :
978-1-4244-1359-1
Electronic_ISBN :
978-1-4244-1360-7
DOI :
10.1109/ASSCC.2007.4425725