• DocumentCode
    2707709
  • Title

    Using parallel GPU architecture for simulation of planar I/F networks

  • Author

    Tiesel, Jan-Phillip ; Maida, Anthony S.

  • Author_Institution
    Center for Adv. Comput. Studies, Univ. of Louisiana at Lafayette, Lafayette, LA, USA
  • fYear
    2009
  • fDate
    14-19 June 2009
  • Firstpage
    3118
  • Lastpage
    3123
  • Abstract
    Our work describes the simulation of a planar network of spiking I/F neurons on graphics processing hardware. The described approach adds to the fast-growing field of general-purpose computation on GPUs (GPGPU). We provide an in-depth explanation of the steps involved in implementing the network using programmable shading hardware. We replicated simulation results by Hopfield et al. and Maida et al. and give qualitative and quantitative measures of our implementation.
  • Keywords
    computer graphic equipment; parallel architectures; graphics processing hardware; parallel GPU architecture; planar I/F networks; programmable shading hardware; simulation; spiking I/F neurons; Biological system modeling; Brain modeling; Computational modeling; Computer architecture; Computer networks; Graphics; Hardware; Mathematical model; Neurons; Pipelines;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Neural Networks, 2009. IJCNN 2009. International Joint Conference on
  • Conference_Location
    Atlanta, GA
  • ISSN
    1098-7576
  • Print_ISBN
    978-1-4244-3548-7
  • Electronic_ISBN
    1098-7576
  • Type

    conf

  • DOI
    10.1109/IJCNN.2009.5178688
  • Filename
    5178688