Title :
A low-power, 3-5-GHz CMOS UWB LNA using transformer matching technique
Author :
Shin, Dong Hun ; Yue, C. Patrick ; Park, Jaejin
Author_Institution :
California Univ., Santa Barbara
Abstract :
This paper presents the design of a 3-5-GHz CMOS ultra-wideband (UWB) Iow-noise amplifier (LNA) utilizing an on-chip transformer to achieve low-power operation and to realize a compact input matching network. Detailed analyses of the input match, voltage gain, and noise figure of the LNA are provided. Implemented in 0.13-mum CMOS, the LNA achieves a maximum power gain of 16.2 dB, an input return loss of greater than 11.0 dB, and a minimum noise figure of 2.8 dB for the 3-5-GHz UWB while consuming only 6.7 mW from a 1.2-V supply. The active area of the fabricated CMOS UWB LNA is 0.32 mm2.
Keywords :
CMOS analogue integrated circuits; MMIC amplifiers; low noise amplifiers; low-power electronics; transformers; ultra wideband communication; CMOS UWB LNA; frequency 3 GHz to 5 GHz; gain 16.2 dB; low-power LNA; noise figure 2.8 dB; on-chip transformer; power 6.7 mW; size 0.13 mum; transformer matching technique; ultra-wideband Iow-noise amplifier; voltage 1.2 V; Band pass filters; Equivalent circuits; Feedback; Impedance matching; Inductance; Low-noise amplifiers; Network topology; Noise figure; Shunt (electrical); Ultra wideband technology; CMOS; RFIC; Ultra-wideband; broadband matching; low-noise amplifier; transformer;
Conference_Titel :
Solid-State Circuits Conference, 2007. ASSCC '07. IEEE Asian
Conference_Location :
Jeju
Print_ISBN :
978-1-4244-1359-1
Electronic_ISBN :
978-1-4244-1360-7
DOI :
10.1109/ASSCC.2007.4425740