A quad 1–10Gb/s serial transceiver in 90nm CMOS

Author

Bi, Han ; Sun, Yehui ; Lei, Kai ; Wu, Zixin ; Chen, Xinqing ; Gao, Song ; Wang, Junning ; Wu, Yongyi ; Wang, Hui

Author_Institution

Integrated Device Technol., Shanghai

fYear

2007

fDate

12-14 Nov. 2007

Firstpage

152

Lastpage

155

Abstract

A quad 1-10 Gb/s serial transceiver in 90 nm digital CMOS technology is presented in this paper. A combination of transmitter pre-emphasis and receiver equalization is used. It can be used for different data rates and short-reach/long-reach applications with low overhead in area and power consumption. It is able to run across a 60-inch FR4 PCB trace with BER<10^-12 at 3.125 Gb/s while consuming 70 mW/channel. At 10 Gb/s, it consumes 98 mW/channel to run across a 10-inch FR4 PCB trace and 90mW/channcl to run across a 4-inch FR4 PCB trace. Its die area is 1.6 mm².

Keywords

CMOS integrated circuits; error statistics; transceivers; BER; PCB trace; bit rate 1 Gbit/s to 10 Gbit/s; bit rate 3.125 Gbit/s; digital CMOS technology; quad serial transceiver; receiver equalization; short-reach long-reach applications; size 90 nm; transmitter pre-emphasis; Bit error rate; CMOS digital integrated circuits; CMOS technology; Clocks; Data communication; Energy consumption; Equalizers; Transceivers; Transmitters; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2007. ASSCC '07. IEEE Asian

Conference_Location

Jeju

Print_ISBN

978-1-4244-1359-1

Electronic_ISBN

978-1-4244-1360-7

Type

conf

DOI

10.1109/ASSCC.2007.4425753

Filename

4425753