DocumentCode
2708250
Title
An 10 nV/√Hz JFET input precision operational amplifier
Author
Riemer, David W.
Author_Institution
Harris Semicond., Melbourne, FL, USA
fYear
1990
fDate
17-18 Sep 1990
Firstpage
223
Lastpage
225
Abstract
The author describes an op amp that combines a novel error feedback architecture with a folded-cascode circuit to produce a single gain stage high-speed op amp with DC precision comparable to that of multiple gain stage circuits. The 2210 μm×3170 μm chip was fabricated in a dielectrically isolated 400-MHz complementary bipolar process
Keywords
error compensation; feedback; linear integrated circuits; monolithic integrated circuits; operational amplifiers; 400 MHz; BiFET IC; DC precision; JFET input; complementary bipolar process; dielectrically isolated; error feedback architecture; folded-cascode circuit; high-speed op amp; operational amplifier; single gain stage; Bandwidth; Dielectrics; FETs; Feedback circuits; Impedance; Mirrors; Operational amplifiers; Performance gain; Transconductance; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Bipolar Circuits and Technology Meeting, 1990., Proceedings of the 1990
Conference_Location
Minneapolis, MN
Type
conf
DOI
10.1109/BIPOL.1990.171168
Filename
171168
Link To Document