FPGA implementation of Augmented Hammerstein predistorters for RF power amplifier linearization

In this paper, FPGA implementation of augmented Hammerstein predistorters for linearizing wideband RF power amplifiers with memory effects is presented. The augmented Hammerstein nonlinear model based predistorter is briefly introduced. The implementation method of the augmented Hammerstein predistortion on FPGA is described in details. The experimental platform based on Agilent vector signal generators for baseband digital predistortion is discussed. The validation results show that the predistortion system exhibits good performance in mitigating the signal deterioration caused by memory effects with two-carrier WCDMA testing signals.