Wafer charging in process equipment and its relationship to GMR heads charging damage

Author

Lukaszek, Wes

Author_Institution

Wafer Charging Monitors Inc., Woodside, CA, USA

fYear

2000

fDate

26-28 Sept. 2000

Firstpage

475

Lastpage

480

Abstract

A significant amount of knowledge and understanding of device charging damage in processing equipment exists in CMOS IC manufacturing. This paper introduces the basic charging mechanisms responsible for gate oxide damage in CMOS ICs, illustrates these mechanisms with examples of measurements obtained in contemporary IC processing equipment, describes a wafer charging characterization method successfully used by integrated circuit and equipment manufacturers to quantify wafer charging in process equipment, and shows how this knowledge could be applied to the control of charging damage in GMR head wafer processing.

Keywords

CMOS integrated circuits; electrostatic discharge; giant magnetoresistance; integrated circuit manufacture; integrated circuit measurement; magnetic heads; magnetoresistive devices; static electrification; CMOS IC manufacturing; CMOS ICs; GMR head charging damage; GMR head wafer processing; IC processing equipment measurements; charging damage; charging mechanisms; device charging damage; equipment manufacturers; gate oxide damage; process equipment; processing equipment; wafer charging; wafer charging characterization method; wafer charging quantification; CMOS integrated circuits; CMOS process; Electrodes; Insulation; Integrated circuit manufacture; Ion beams; Magnetic heads; Manufacturing processes; Pulp manufacturing; Surface charging;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2000

Conference_Location

Anaheim, CA, USA

Print_ISBN

1-58537-018-5

Type

conf

DOI

10.1109/EOSESD.2000.890120

Filename

890120