DocumentCode
27094
Title
On the Capacity of Bufferless Networks-on-Chip
Author
Shpiner, Alexander ; Kantor, Erez ; Pu Li ; Cidon, Israel ; Keslassy, Isaac
Author_Institution
Dept. of Electr. Eng., Technion - Israel Inst. of Technol., Haifa, Israel
Volume
26
Issue
2
fYear
2015
fDate
Feb. 1 2015
Firstpage
492
Lastpage
506
Abstract
Networks-on-Chip (NoCs) form an emerging paradigm for communications within chips. In particular, bufferless NoCs require significantly less area and power consumption, but also pose novel major scheduling problems to achieve full capacity. In this paper, we provide first insights on the capacity of bufferless NoCs. In particular, we present optimal periodic schedules for several bufferless NoCs with a complete-exchange traffic pattern. These schedules particularly fit distributed-programming models and network congestion-control mechanisms. In addition, for general traffic patterns, we also introduce efficient greedy scheduling algorithms, that often outperform simple greedy online algorithms and cannot have deadlocks. Finally, using network simulations, we quantify the speedup of our suggested algorithms, and show how they improve throughput by up to 35 percent on a torus network.
Keywords
distributed programming; greedy algorithms; hypercube networks; network-on-chip; NoC; bufferless networks-on-chip; complete-exchange traffic pattern; distributed-programming models; general traffic patterns; greedy scheduling algorithms; network congestion-control mechanisms; network simulations; optimal periodic schedules; torus network; Algorithm design and analysis; Network topology; Optimal scheduling; Routing; Schedules; Scheduling; Topology; Networks-on-Chip; all-to-all personalized exchange; bufferless network; collective communication; complete-exchange; interprocessor communication; scheduling;
fLanguage
English
Journal_Title
Parallel and Distributed Systems, IEEE Transactions on
Publisher
ieee
ISSN
1045-9219
Type
jour
DOI
10.1109/TPDS.2014.2310226
Filename
6762977
Link To Document