DocumentCode
2709665
Title
Arithmetic-unit and processor design for neural networks
Author
Omondi, Amos R.
Author_Institution
Centre for High-Performance Embedded Syst., Nanyang Technol. Univ., Singapore
Volume
2
fYear
2000
fDate
2000
Firstpage
935
Abstract
The last decade saw a proliferation of research into the design of neurocomputers, many of which did not get beyond the prototype stage. We argue that, on the whole, neurocomputers are no longer viable; like, say, database computers before them, their time has passed before they became a common reality. We consider the implementation of hardware neural networks, from the level of arithmetic to complete individual processors and parallel processors and show that currents trends in computer architecture are not supportive of a case for custom neurocomputers. We argue that in the future, neural network processing ought to be mostly restricted to general-purpose processors or to processors that have been designed for other applications. There are just one or two two exceptions to this
Keywords
general purpose computers; neural net architecture; parallel architectures; arithmetic unit design; computer architecture; general-purpose processors; neural network hardware; neurocomputers; parallel processors; processor design; Adders; Application software; Computer architecture; Databases; Digital arithmetic; Embedded system; Hardware; Neural networks; Process design; Prototypes;
fLanguage
English
Publisher
ieee
Conference_Titel
Neural Networks for Signal Processing X, 2000. Proceedings of the 2000 IEEE Signal Processing Society Workshop
Conference_Location
Sydney, NSW
ISSN
1089-3555
Print_ISBN
0-7803-6278-0
Type
conf
DOI
10.1109/NNSP.2000.890174
Filename
890174
Link To Document